dix_cp_onwire_xc.c

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/* This file is automatically generated from dix/cm/dix_cp_onwire.h */

#include "lib/misc.h"                       /* offsetof */
#include "lib/assert.h"
#include "xcode/xcode.h"

#include "dix/cm/dix_cp_onwire.h"
#include "dix/cm/dix_cp_onwire_xc.h"

struct m0_xcode_type *m0_dix_cpx_xc;

static struct _m0_dix_cpx_s {
        struct m0_xcode_type  _type;
        struct m0_xcode_field _child[7];
} _m0_dix_cpx = {
        ._type = {
                .xct_aggr   = M0_XA_RECORD,
                .xct_name   = "m0_dix_cpx",
                .xct_sizeof = sizeof (struct m0_dix_cpx),
                .xct_nr     = 7,
                .xct_flags  = M0_XCODE_TYPE_FLAG_DOM_RPC,
        }
};

struct m0_xcode_type *m0_dix_cpx_xc = &_m0_dix_cpx._type;
M0_BASSERT(offsetof(struct _m0_dix_cpx_s, _child[0]) ==
        offsetof(struct m0_xcode_type, xct_child[0]));


M0_BASSERT(sizeof(struct m0_dix_cpx) == 240U);

M0_BASSERT(sizeof ((struct m0_dix_cpx *)0)->dcx_cp == 88U);
M0_BASSERT(offsetof(struct m0_dix_cpx, dcx_cp) == 0U);
M0_BASSERT(sizeof ((struct m0_dix_cpx *)0)->dcx_ctg_fid == 16U);
M0_BASSERT(offsetof(struct m0_dix_cpx, dcx_ctg_fid) == 88U);
M0_BASSERT(sizeof ((struct m0_dix_cpx *)0)->dcx_ctg_op_flags == 4U);
M0_BASSERT(offsetof(struct m0_dix_cpx, dcx_ctg_op_flags) == 104U);
M0_BASSERT(sizeof ((struct m0_dix_cpx *)0)->dcx_failed_idx == 8U);
M0_BASSERT(offsetof(struct m0_dix_cpx, dcx_failed_idx) == 112U);
M0_BASSERT(sizeof ((struct m0_dix_cpx *)0)->dcx_phase == 4U);
M0_BASSERT(offsetof(struct m0_dix_cpx, dcx_phase) == 120U);
M0_BASSERT(sizeof ((struct m0_dix_cpx *)0)->dcx_ab_key == 56U);
M0_BASSERT(offsetof(struct m0_dix_cpx, dcx_ab_key) == 128U);
M0_BASSERT(sizeof ((struct m0_dix_cpx *)0)->dcx_ab_val == 56U);
M0_BASSERT(offsetof(struct m0_dix_cpx, dcx_ab_val) == 184U);



M0_INTERNAL void m0_xc_m0_dix_cpx_struct_init(void)
{
        _m0_dix_cpx._child[0] = (struct m0_xcode_field) {
                .xf_name   = "dcx_cp",

                .xf_type   = m0_cpx_xc,

                .xf_tag    = 0,
                .xf_opaque = NULL,
                .xf_offset = offsetof(struct m0_dix_cpx, dcx_cp),
                .xf_read   = NULL,
                .xf_decor  = {
                        [M0_XCODE_DECOR_READ] = NULL
                }
        };
        m0_xc_m0_cpx_struct_init();

        _m0_dix_cpx._child[1] = (struct m0_xcode_field) {
                .xf_name   = "dcx_ctg_fid",

                .xf_type   = m0_fid_xc,

                .xf_tag    = 0,
                .xf_opaque = NULL,
                .xf_offset = offsetof(struct m0_dix_cpx, dcx_ctg_fid),
                .xf_read   = NULL,
                .xf_decor  = {
                        [M0_XCODE_DECOR_READ] = NULL
                }
        };
        m0_xc_m0_fid_struct_init();

        _m0_dix_cpx._child[2] = (struct m0_xcode_field) {
                .xf_name   = "dcx_ctg_op_flags",

                .xf_type   = &M0_XT_U32,

                .xf_tag    = 0,
                .xf_opaque = NULL,
                .xf_offset = offsetof(struct m0_dix_cpx, dcx_ctg_op_flags),
                .xf_read   = NULL,
                .xf_decor  = {
                        [M0_XCODE_DECOR_READ] = NULL
                }
        };
        m0_xc_u32_init();

        _m0_dix_cpx._child[3] = (struct m0_xcode_field) {
                .xf_name   = "dcx_failed_idx",

                .xf_type   = &M0_XT_U64,

                .xf_tag    = 0,
                .xf_opaque = NULL,
                .xf_offset = offsetof(struct m0_dix_cpx, dcx_failed_idx),
                .xf_read   = NULL,
                .xf_decor  = {
                        [M0_XCODE_DECOR_READ] = NULL
                }
        };
        m0_xc_u64_init();

        _m0_dix_cpx._child[4] = (struct m0_xcode_field) {
                .xf_name   = "dcx_phase",

                .xf_type   = &M0_XT_U32,

                .xf_tag    = 0,
                .xf_opaque = NULL,
                .xf_offset = offsetof(struct m0_dix_cpx, dcx_phase),
                .xf_read   = NULL,
                .xf_decor  = {
                        [M0_XCODE_DECOR_READ] = NULL
                }
        };
        m0_xc_u32_init();

        _m0_dix_cpx._child[5] = (struct m0_xcode_field) {
                .xf_name   = "dcx_ab_key",

                .xf_type   = m0_rpc_at_buf_xc,

                .xf_tag    = 0,
                .xf_opaque = NULL,
                .xf_offset = offsetof(struct m0_dix_cpx, dcx_ab_key),
                .xf_read   = NULL,
                .xf_decor  = {
                        [M0_XCODE_DECOR_READ] = NULL
                }
        };
        m0_xc_m0_rpc_at_buf_struct_init();

        _m0_dix_cpx._child[6] = (struct m0_xcode_field) {
                .xf_name   = "dcx_ab_val",

                .xf_type   = m0_rpc_at_buf_xc,

                .xf_tag    = 0,
                .xf_opaque = NULL,
                .xf_offset = offsetof(struct m0_dix_cpx, dcx_ab_val),
                .xf_read   = NULL,
                .xf_decor  = {
                        [M0_XCODE_DECOR_READ] = NULL
                }
        };
        m0_xc_m0_rpc_at_buf_struct_init();

        M0_POST(m0_xcode_type_invariant(m0_dix_cpx_xc));
}

M0_INTERNAL void m0_xc_dix_cm_dix_cp_onwire_init(void)
{
        m0_xc_m0_dix_cpx_struct_init();
}

M0_INTERNAL void m0_xc_dix_cm_dix_cp_onwire_fini(void)
{
}